When writing a driver for ARM A64 CPU, we need to write some ASM functions that are then used by C. In this case, we may need to use some general-purpose registers to implement logic functions. So, …
read more…
Instruction Extension Note Description …
read more…
According to the D1 user manual, the integrated C906 supports 32kB D-cache and the following write-through thresholds:
* continuously storing 4 full cache lines.
* continuously storing 16 full …
read more…
Base ISA
ISA Description RV32I Provide 32-bit address spaces. …
read more…
This tool is designed to quickly jump to a specific directory in the Linux shell. you can find the source code and the manual at <https://github.com/execonic/linux-jcd>.
Commits…
read more…
Link and Lane
Figure 1. PCIe link
A lane represents a set of differential signal pairs (one pair for transmission,
one pair for reception). The data rates supported by each lane are listed in
.…
read more…
