Which Registers Should be Used When Coding ARM A64 ASM?

When writing a driver for ARM A64 CPU, we need to write some ASM functions that are then used by C. In this case, we may need to use some general-purpose registers to implement logic functions. So, which general-purpose registers are preferred?

I'll explain this with an example. The example is a function that disables the EL2 MMU. It does this by clearing bit 0 in TCR_EL2.

According to the ARM A64 PCS(Procedure Call Standard), X9-X15 are the corruptible registers. This means the callee ^[a] does not need to save values in these registers to the stack. So, I can write an ASM function as shown below. The disable_mmu function doesn't generate any memory accesses, except for the ones that are triggered by instruction execution.

.global disable_mmu
.type disable_mmu @function
disable_mmu:
	mrs x9, tcr_el2
	bic x9, x9, #1
	mrs tcr_el2, x9
	ret

According to PCS, X0-X7 is used by the caller to pass arguments to the callee. So, before using these registers to perform a logical function that is not related to arguments, we should confirm that the arguments in these registers will not be used any more.

Except for the point mentioned above, these registers are used in the same way as the X9-X15.

.global disable_mmu
.type disable_mmu @function
disable_mmu:
	mrs x1, tcr_el2
	bic x1, x1, #1
	mrs tcr_el2, x1
	ret

The other registers are callee-saved^[b], except for those that have special purposes. That is to say, in addition to the memory access triggered by the instruction execution, the disable_mmu function will also generate other memory accesses and need to calculate SP, which will slow down the program.

.global disable_mmu
.type disable_mmu @function
disable_mmu:
	sub sp, sp, #0x10
	str x19, [sp]
	mrs x19, tcr_el2
	bic x19, x19, #1
	mrs tcr_el2, x19
	ldr x19, [sp]
	add sp, sp, #0x10
	ret

• ARM A64 Procedure Call Standard