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C906 RISC-V RV-Dock

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RV-Dock C906 Write Performance

This page documents some experiment data on XuanTie C906 cache write performance.

According to the D1 user manual, the integrated C906 supports 32kB D-cache and the following write-through thresholds:

  • continuously storing 4 full cache lines.
  • continuously storing 16 full cache lines.
  • continuously storing 64 full cache lines.

Therefore, I would like to investigate the write performance under different configurations.

Environment And Benchmark

Environment

  • Lichee RV-Dock board.
  • Memory test region [0x30000, 0x44000).

Benchmark

  1. Specify 1K region RR [A1A_1, A2A_2].
  2. Repeat writing data continuously from A1A_1 to A2A_2 until 128MB of data is written. Then get the consumed time as a sample point.
  3. Increase A2A_2 by 1kB and jump to step 2.

Experiment Result

Disable D-Cache

Enable D-Cache And Disable Write-Through

Enable D-Cache And Enable Write-Through With 4 Cache Line

Enable D-Cache And Enable Write-Through With 16 Cache Line

Enable D-Cache And Enable Write-Through With 64 Cache Line

All In One

Creation Date: 2024/09/04, Last modified: 2024/09/04, Author: Siyuan Liu