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===== Further Reading =====

  * [[https://marc.info/?l=linux-arm-kernel&m=138581227811109&w=2]]
  * https://community.nxp.com/t5/i-MX-Processors/i-MX53-Code-Alignment-and-Execution-Speed-explanation/m-p/289578?profile.language=zh-CN
  * https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm/lib/delay-loop.S?id=11d4bb1bd067f9d01d18f620ccfad516dc579593
  * https://community.arm.com/support-forums/f/architectures-and-processors-forum/49219/code-alignment-significantly-affecting-performance/171744#171744
  * https://community.arm.com/support-forums/f/architectures-and-processors-forum/5320/how-does-the-btic-branch-target-instruction-cache-works
  * https://developer.arm.com/documentation/ddi0464/f/L1-Memory-System/L1-instruction-memory-system
  * https://developer.arm.com/documentation/ddi0460/d/Prefetch-Unit/About-the-prefetch-unit?lang=en
  * https://netwinder.osuosl.org/pub/netwinder/docs/arm/ARM8vC.pdf