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====== WFE/SEV ======

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|desc=Introduce <wrap isa>WFE</wrap>/<wrap isa>WFET</wrap>, <wrap isa>SEV</wrap>/<wrap isa>SEVL</wrap> instructions.}}

  * These instructions are used to implement the following mechanisms for power saving (Put a PE into low-power state that is IMPLEMENTATION DEFINED).
    * Wait for event (<wrap isa>WFE</wrap>/<wrap isa>WFET</wrap>, <wrap isa>SEV</wrap>/<wrap isa>SEVL</wrap>)
  * The working mechanism of <wrap isa>WFE</wrap>/<wrap isa>WFET</wrap>, <wrap isa>SEV</wrap>/<wrap isa>SEVL</wrap> is based on the <wrap reg>Event</wrap> register((note:>A conceptual register which cannot be explicitly accessed.)). Each PE has a bit in the <wrap reg>Event</wrap> register corresponding to it.
  * The <wrap reg>Event</wrap> register can only be cleared by <wrap isa>WFE</wrap>/<wrap isa>WFET</wrap>, but can be set by <wrap isa>SEV</wrap>/<wrap isa>SEVL</wrap> or [[#clear-mechanism|other mechanisms]] (This means that the <wrap isa>WFE</wrap>/<wrap isa>WFET</wrap> can be completed when these cases occur.).
  * <wrap isa>SEV</wrap>/<wrap isa>SEVL</wrap> cannot wake up a PE that has been placed in a low power state by the <wrap isa>WFI</wrap> or <wrap isa>WFIT</wrap>.

===== Wait for event =====

==== The Event Register ====

<callout type="info">

When the PE executes <wrap isa>WFE</wrap> or <wrap isa>WFET</wrap>, all of the following apply.
  * If the <wrap reg>Event</wrap> register is clear, then the PE can enter the low-power state.
  * If the <wrap reg>Event</wrap> register is set, then all of the following apply:
    * The PE does not suspend operation.
    * The <wrap reg>Event</wrap> register is cleared.
    * The <wrap isa>WFE</wrap> or <wrap isa>WFET</wrap> instruction completes immediately. 

The <wrap reg>Event</wrap> Register for a PE is set by any of the following:

  * A Send Event instruction, <wrap isa>SEV</wrap>, executed by any PE in the system.
  * A Send Event Local instruction, <wrap isa>SEVL</wrap>, executed by the PE. \\ <wrap #clear-mechanism />
  * An exception return.
  * The clearing of the global monitor for the PE.
  * An event from a Generic Timer event stream.
  * An event sent by some IMPLEMENTATION DEFINED mechanism.

</callout>

==== The Send Event instructions====

<callout type="info">

  *<wrap isa>SEV</wrap>, Send Event: Causes an event to be signaled to all PEs in a multiprocessor system.((note:>Set only the <wrap reg>Event</wrap> register? Can it do something else by IMPLEMENTATION DEFINED?))
  *<wrap isa>SEVL</wrap>, Send Event Local: Causes an event to be signaled locally without requiring the event to be signaled to other PEs in a multiprocessor system.

</callout>

=== Why need SEVL? ===

In ARMv8-A A64, the <wrap isa>WFE</wrap> instruction is unconditional. So I think there are two typical ways to implement the lock function, with or without <wrap isa>SEVL</wrap>.

<WRAP group>
<WRAP column half>
The first way (without <wrap isa>SEVL</wrap>) is:

<codeprism lang=arm-asm>
func spin_lock
  MOV   w2, #1
loop:
  LDXR  w1, [x0]
  CBNZ  w1, sleep
  STXR  w1, w2, [x0]
  CBZ   w1, end
  B     loop
sleep:
  WFE
  B     loop
end:
  ret
endfunc spin_lock
</codeprism>
</WRAP>

<WRAP column half>
The second way (with <wrap isa>SEVL</wrap>) is:

<codeprism lang=arm-asm>
func spin_lock
  MOV   w2, #1
  SEVL
l1:
  WFE
l2:
  LDXR  w1, [x0]
  CBNZ  w1, l1
  STXR  w1, w2, [x0]
  CBNZ  w1, l2
  RET
endfunc spin_lock
</codeprism>
</WRAP></WRAP>

As the first way listed above, I think the lock function will still work fine with just <wrap isa>WFE</wrap>. 
Therefore, I still don't understand why ARM designed it. <wrap suspect>Maybe it can be used for efficiency or other scenarios.</wrap>

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===== Further Reading =====

  * [[https://developer.arm.com/documentation/ddi0487/ia/|Arm® Architecture Reference Manual for A-profile architecture]]
    * <wrap clause>D1.6. Mechanisms for entering a low-power stat</wrap>e
    * <wrap clause>B2.9.2. Exclusive access instructions and Shareable memory locations</wrap>
  * [[https://community.arm.com/support-forums/f/architectures-and-processors-forum/4273/how-to-understand-armv8-sevl-instruction-in-spin-lock]]